Nanometer-Scale Vertical-Sidewall Reactive Ion Etching of InGaAs for 3-D III-V MOSFETs

作者：Zhao Xin^*; del Alamo Jesus A

来源：IEEE Electron Device Letters, 2014, 35(5): 521-523.

DOI：10.1109/LED.2014.2313332

• Digital etch
• InGaAs
• MOSFET
• nanowire
• reactive ion etching
• top-down
• vertical channel

This letter introduces a novel inductively coupled plasma-reactive ion etching (ICP-RIE) technique based on a BCl3/SiCl4/Ar chemistry for fabricating sub-20 nm diameter InGaAs nanowires with smooth, vertical sidewall and high aspect ratio (>10). To mitigate dry-etch damage, RIE is followed by a digital etch method comprised of multiple cycles of self-limiting low power O-2 plasma oxidation and diluted H2SO4 rinse. Using these technologies, we demonstrate vertical InGaAs gate-all-around nanowire MOSFETs with 30 nm diameter. Digital etch improves both the subthreshold swing and peak transconductance, indicating enhanced sidewall interfacial quality. The combination of RIE and digital etch techniques proposed here is promising for future 3-D III-V MOSFETs.

• 出版日期2014-5
• 单位MIT