A multi-band CMOS PLL-based frequency synthesizer for DRM/DRM plus /DAB systems

作者:Wang Junliang; Wang Zhigong*; Xu Jian; Wu Yiqiang; Tian Mi; Lei Xuemei; Ma Li; Tang Lu
来源:Analog Integrated Circuits and Signal Processing, 2014, 80(2): 293-304.
DOI:10.1007/s10470-014-0341-x

摘要

A wideband frequency synthesizer is designed and fabricated in a 0.18 mu m CMOS technology. It is developed for DRM/DRM+/DAB systems and is based on a programmable integer-N phase-locked loop. Instead of using several synthesizers for different bands, only one synthesizer is used, which has three separated divider paths to provide quadrature 8-phase LO signals. A wideband VCO covers a frequency band from 2.0 to 2.9 GHz, generates LO signals from 32 to 72 MHz, and from 250 to 362 MHz. In cooperation with a programmable XTAL multi-divider at the PLL input and output dividers at the PLL output, the frequency step can be altered from 1 to 25 kHz. It provides an average output phase noise of -80 dBc/Hz at 10 kHz offset, -95 dBc/Hz at 100 kHz offset, and -120 dBc/Hz at 1 MHz offset for all the supported channels. The output power of the LO signals is tunable from 0 dBm to +3 dBm, and the phase of quadrature signals can also be adjusted through a varactor in the output buffer. The power consumption of the frequency synthesizer is 45 mW from a 1.8 V supply.