A co-processed contour tracing algorithm for a smart camera

作者：Jordan Harald^*; van Dyck Walter; Smodic Rene

来源：Journal of Real-Time Image Processing, 2011, 6(1): 23-31.

DOI：10.1007/s11554-010-0182-5

• Image processing
• Object recognition
• Contour tracing
• FPGA pre-processing
• FPGA filtering

This paper describes a new approach for a contour-tracing algorithm targeting a low-power smart camera for industrial inspection. This embedded system consists of the three major components: CMOS sensor, FPGA and microprocessor. By analysing a linear-time algorithm used for simultaneously labelling connected components and their contours, two independent tasks could be identified. By efficiently assigning these two parts to the FPGA and the microprocessor achieving high-speed real-time operation is possible. The novelty of the proposed method is the development of a sequential co-processing algorithm for the FPGA. A Contour-Neighbourhood 3 x 3 filter kernel for converting the grey-level data to an intermediate representation containing directional information was added into an FPGA image-processing design. This pre-processed data is then provided to a software component which is executed on a microprocessor. The final result of this analysis is a sorted list of contour points for each object in the image. Further increases of the data throughput and the workload of the hardware resources are achievable by pipelining the subtasks of consecutive images. The runtime behaviour of this parallel operation is sufficient for meeting the real-time requirements of an industrial 2D measurement system.

• 出版日期2011-3