A 30 GHz CMOS Frequency Synthesizer for V-Band Applications

作者：Weng Po Shuan^*; Lu Liang Hung

来源：IEEE Microwave and Wireless Components Letters, 2012, 22(8): 433-435.

DOI：10.1109/LMWC.2012.2206016

• Distributed band-selection switches
• programmable divider
• sub-harmonic frequency synthesizer

A CMOS sub-harmonic frequency synthesizer suitable for V-band applications is presented in this letter. By employing distributed switches, the output swing of the voltage-controlled oscillator can be significantly enhanced while maintaining sufficient frequency tuning range for the second-harmonic extraction. With a direct injection-locked divide-by-two circuit and current-mode-logic dividers as the prescaler stage, a nested 2/3-cell-based retimed programmable counter is adopted for frequency synthesis. Based on the proposed architecture, a 30 GHz frequency synthesizer is implemented using a 0.18 mu m standard CMOS process.

• 出版日期2012-8
• 单位中国科学院电工研究所