New Majority Gate-Based Parallel BCD Adder Designs for Quantum-Dot Cellular Automata

作者：Zhang, Tingting; Pudi, Vikramkumar; Liu, Weiqiang^*

来源：IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2019, 66(7): 1232-1236.

DOI：10.1109/TCSII.2018.2878717

• Majority gate
• parallel BCD adder
• carry lookahead
• quantum-dot cellular automata

In this brief, we first theoretically re-defined output decimal carry in terms of majority gates and proposed a carry lookahead structure for calculating all the intermediate output carries. We have used this method for designing the multi-digit decimal adders. Theoretically, our best n-digit decimal adder design reduces the delay and area-delay product by 50% compared with previous designs. We have implemented our designs using QCADesigner tool. The proposed QCADesigner based 8-digit PBA-BCD adder achieves over 38% less delay compared with the best existing designs.

• 出版日期2019-7
• 单位南京航空航天大学; 南阳理工学院