A Low-Voltage 30-GHz CMOS Divide-by-Three ILFD With Injection-Switched Cross-Coupled Pair Technique

作者：Seow Boon Eu; Huang Tzuen Hsi; Wu Chen Yu; Pao Peng Yu; Chuang Huey Ru

来源：IEEE Transactions on Microwave Theory and Techniques, 2017, 65(5): 1560-1568.

DOI：10.1109/TMTT.2017.2647943

• Divide-by-three
• frequency divider (FD)
• injection locked
• millimeter wave (mm-wave)
• 90-nm CMOS
• 10 GHz
• 30 GHz

This paper presents the design of a divide-by-three frequency divider operating at 30 GHz with an injection-switched cross-coupled pair topology. A wider locking range as well as a lower operation voltage can be achieved because of this newly proposed topology. The divider is implemented in a 90-nm standard CMOS process. The total locking range of the divider core is 4.5 GHz with a power consumption of 2.85 mW from a supply voltage of 0.5 V. The total power consumption of the buffers is 2.65 mW from a supply voltage of 1.0 V. The measured output phase noise is -141 dBc/Hz at 1-MHz offset when the input referred signal has a phase noise of -131 dBc/Hz at 1-MHz offset from 30 GHz. The phase-noise difference of 10 dB is close to the theoretical value of 9.5 dB for division-by-three. The total chip size is 0.48 mm(2), and the divider core size is only about 0.14 mm(2) .

• 出版日期2017-5