科研之友
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摘要
NASA has funded, through their Strategic Astrophysics Technology (SAT) program, the development of a cross strip (XS) microchannel plate (MCP) detector with the intention to increase its technology readiness level (TRL), enabling prototyping for future NASA missions. One aspect of the development is to convert the large and high powered laboratory Parallel Cross Strip (PXS) readout electronics into application specific integrated circuits (ASICs) to decrease their mass, volume, and power consumption (all limited resources in space) and to make them more robust to the environments of rocket launch and space. The redesign also foresees to increase the overall readout event rate, and decrease the noise contribution of the readout system. This work presents the design and verification of the first stage for the new readout system, the 16 channel charge sensitive amplifier ASIC, called the CSAv3. The single channel amplifier is composed of a charge sensitive amplifier (pre-amplifier), a pole zero cancellation circuit and a shaping amplifier. An additional output stage buffer allows polarity selection of the output analog signal. The operation of the amplifier is programmable via serial bus. It provides an equivalent noise charge (ENC) of around 600 e(-) and a baseline gain of 10 mV/fC. The full scale pulse shaped output signal is confined within 100 ns, without long recovery tails, enabling up to 10 MHz periodic event rates without signal pile up. This ASIC was designed and fabricated in 130 nm, TSMC CMOS 1.2V technology. In addition, we briefly discuss the construction of the readout system and plans for the future work.
- 出版日期2017-4
