An All-Digital Self-Calibration Method for a Vernier-Based Time-to-Digital Converter

作者：Rashidzadeh Rashid^*; Ahmadi Majid; Miller William C

来源：IEEE Transactions on Instrumentation and Measurement, 2010, 59(2): 463-469.

DOI：10.1109/TIM.2009.2024699

• Calibration
• delay lines
• phase-locked loop (PLL)
• time-to-digital converter (TDC)
• Vernier delay line (VDL)

This paper presents a new calibration method for a Vernier-based time-to-digital converter (TDC). In the proposed method, delay lines in the TDC are configured as on-chip ring oscillators for generating a sequence of time events. These time events are applied to the TDC in the calibration mode, and then, the probability distribution of output codes is determined. The variations of the quantization step and the actual transfer characteristic representing the TDC are estimated through statistical analysis of the output codes. The proposed method eliminates the need for accurate external sources typically used for TDC calibration. Simulation and experimental results using a field-programmable gate array platform indicate that the method can successfully be employed to calibrate high-resolution TDCs with reasonable accuracy.

• 出版日期2010-2