A 1-V CMOS pseudo-differential amplifier with multiple common-mode stabilization and frequency compensation loops

作者：Shen Meng Hung^*; Lan Po Hsiang; Huang Po Chiun

来源：IEEE Transactions on Circuits and Systems II-Express Briefs, 2008, 55(5): 409-413.

DOI：10.1109/TCSII.2007.914445

• CMOS integrated circuits
• frequency compensation
• low voltage
• operational amplifier

This paper presents an operational amplifier for a IN supply voltage. It comprises three gain stages with ac-boosting and buffered Miller feedback compensation circuits. The implementation uses a standard 0.35-mu m CMOS process (V-TN = 0.6 V and V-TP = - 0. 72 V). To accommodate maximum voltage headroom. between power rails, a pseudo-differential structure is adopted in this amplifier. The large common-mode gain associated with the structure is suppressed by two common-mode stabilization loops. The amplifier driving 100-pF loads achieves a 4.3-MHz gain-bandwidth product. The settling time of a 1-V-pp input step signal is 1.1 mu s. The amplifier consumes 249 mu W and occupies 0.06-mm(2) silicon area.

• 出版日期2008-5
• 单位清华大学