摘要

Simple analytical differential nonlinearity (DNL) yield models of an arbitrarily segmented digital-to-analog converter (DAC) are presented. The yield estimation requires the analysis of the correlated DNL variation at each transition of the input code. Instead of using high-order integration of multivariate Gaussian probability density functions, this brief explores a new perspective on the formulation of the DNL yield by selecting essential test codes and by analyzing correlation coefficients between the test codes. Generally, for most DAC designs > 6 bits, DNL caused by the binary and thermometer groups are equivalently uncorrelated. This statistical independence simplifies the DNL yield model as a multiplication of each section's yield, which involves only separate 1-D integration. We provide behavioral and HSPICE Monte Carlo simulation results that precisely match the yield estimation predicted by our models.

  • 出版日期2012-9

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