摘要
This paper presents a low power consumption and low cost MPEG audio decoder design architecture. An ASIC implementation of MPEG Layer 11 audio decoder is reported. The decoder just uses 20 K logic gates and the power consumption is only 10 mW using 0.18 micron CMOS technology. The development of MPEG4 AAC decoder using similar architecture is covered as well.
- 出版日期2007
- 单位重庆邮电大学