An implementation of a Power System Smart Waveform Recorder using FPGA and ARM cores

作者：Kapisch E B; Silva L R M^*; Martins C H N; Barbosa A S; Filho L M A; Duque C A; Tavil A E; de Souza L A R

来源：Measurement, 2016, 90: 372-381.

DOI：10.1016/j.measurement.2016.04.062

• Detector
• Compressor
• Power Quality
• Wavelet
• FPGA
• Embedded Processor

In this paper, the design and the prototype implementation of a Power Quality (PQ) disturbance detector and compressor are described. This instrument, named Power System Smart Waveform Recorder (PSSWR), is able to acquire the samples of the Electric Power System (EPS) signals and process them in order to detect, compress and store the disturbances waveforms into an SD card, from which it can be reconstructed and analyzed offline with a suitable computer application. The prototype uses, among other devices, Field Programmable Gate Array (FPGA) and ARM platforms to work with the EPS signals in a smart way. The PSSWR is able to detect and record either the waveform of the well-known PQ disturbance as well the new PQ disturbances not yet observed in EPS, thanks to the Novelty Detection concept. This characteristic is important in the new context of smart grids where hidden disturbances can be detected by the methodology.

• 出版日期2016-8