A VLSI implementation of lifting-based forward and inverse wavelet transform

作者：Liu Leibo^*; Zhang Milin; Meng Hongying; Zhang Li; Wang Zhihua

来源：Chinese Journal of Electronics, 2007, 16(3): 423-428.

• DWT (discrete wavelet transform)
• lifting
• SCLA (spatial combinative lifting algorithm)

A VLSI architecture of Spatial combinative lifting algorithm (SCLA) based 2-D forward and inverse Discrete wavelet transform (DWT) with both 5/3, 9/7 filters and 5-level Mallat decomposition method is proposed in this paper. This processor is fabricated using UMC 0.18 mu m CMOS technology in a 1.5mm x 1.5mm die, containing 28k gates plus 47kbits on-chip SRAM. Test shows this chip can process at 23.29 frames/s with image resolution up to 1920 x 1080 x 24 bits (YUV422 full color) under 100MHz, and consuming 50mW under a 1.8V power supply.

• 出版日期2007-7
• 单位清华大学