摘要

This paper presents a fully integrated wireless electrocardiogram (ECG) SoC implemented in asynchronous architecture, which does not require system clock as well as off-chip antenna. Several low power techniques are proposed to minimize power consumption. At the system level, a newly introduced event-driven system architecture facilitates the asynchronous implementation, thus removes the system clock leading to a true ECG-on-chip solution. A DC-coupled analog front-end is introduced together with a baseline stabilizer to boost the input impedance to 3.6 G Omega and mitigate the electrode offset, which is less sensitive to motion artefact and contact impedance imbalance, making it well suited for dry-electrode based applications. Level-crossing analog-to-digital converter (LC-ADC) is employed to take the advantage of burst nature of ECG signal leading to at least 5 times reduction in sampling points compared to Nyquist sampling. A digitally implemented impulse-radio ultra-wideband transmitter is seamlessly integrated with LC-ADC and an on-chip antenna for wireless communications. Implemented in 0.13 mu m CMOS technology, the ECG-on-chip consumes 2.89 mu W under 1.2 V supply while transmitting the raw ECG data, which attains one order of magnitude lower than the current state-of-the-art designs. The fully integrated ECG SoC requires no external clocks and off-chip antenna, making it a good candidate for low cost and disposable wireless ECG patches, such as epidermal electronics.