摘要

Three-dimensional integration circuits (3-D ICs) technology provides various opportunities for new computer system architectures. Data prefetching, which can utilize the abundant memory bandwidth of 3-D IC technology is one of the most promising approaches in 3D IC technology today. This paper analyzes the efficiency of aggressive prefetching based on the huge bandwidth of 3-D IC technology. The performance analysis results reveal that these simple aggressive prefetching mechanisms cannot achieve performance improvements even with the enormous memory bandwidth of 3-D IC technology. An adaptive L2 cache prefetching mechanism is proposed, which adjusts the amount of prefetching data adaptively based on the memory access pattern to exploit the abundant memory bandwidth effectively. The proposed mechanism can achieve a performance improvement of about 5% more on average than a conventional 1 MB L2 cache, and it can significantly reduce energy consumption of an L2 cache by about 29% on average over the conventional 2MB L2.

  • 出版日期2013

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