摘要

In this paper a novel method is proposed for analysing the power/ground bounces on the conductive planes in a high-speed multichip module (MCM) layout system; it is an integrated partial-element equivalent-circuit method with a block reduction algorithm and the recursive convolution formulation. This method has the advantage of simple parameter extraction, high efficiency and high precision. Moreover, a hierarchical modelling strategy is proposed for modelling large power/ground planes by cascading order-reduction time-domain macromodels of small power/ground planes while the power/ground bounces are directly analysed in the time domain. Examples indicate that the proposed method gives high accuracy and high efficiency for the time-domain simulation of power/ground bounces on the conductive planes in high-speed MCMs, and the modelling strategy is efficient.

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