Fast image recognition based on n-tuple neural networks implemented in an FPGA

作者：Burian Petr; Holota Radek^*

来源：Journal of Real-Time Image Processing, 2016, 11(1): 155-166.

DOI：10.1007/s11554-013-0331-8

• Image recognition
• FPGA
• Neural network
• N-tuple
• Qsys interconnect

This paper deals with the design and the implementation of an image recognition system based on FPGA devices. It explores an n-tuple methodology using node 'grouping' and the possible advantages offered by this little-known technique. The paper is based on the implementation of this concept by an FPGA device. A novel approach to the organization of the neural networks data in the n-tuple memory is introduced. The system was tested on a real-world recognition task-the recognition of road signs. The test results are presented and discussed. It is concluded that the designed system may be a powerful part of more complex equipment for the solution of many recognition issues.

• 出版日期2016-1