A 10 Gb/s 45 mW Adaptive 60 GHz Baseband in 65 nm CMOS

作者：Thakkar Chintan^*; Kong Lingkai; Jung Kwangmo; Frappe Antoine; Alon Elad

来源：IEEE Journal of Solid-State Circuits, 2012, 47(4): 952-968.

DOI：10.1109/JSSC.2012.2184651

• Carrier recovery
• clock & data recovery (CDR)
• decision feedback equalizer (DFE)
• mixed-signal
• phase rotator
• sign-sign LMS
• variable gain amplifier (VGA)
• 60 GHz

This paper presents a low-power mixed-signal adaptive 60 GHz baseband in 65 nm CMOS. The design integrates variable gain amplifiers, analog phase rotator, 40-coefficient I/Q decision feedback equalizers (DFEs), clock generation and data recovery circuits, and adaptation hardware. The baseband achieves 10 Gb/s operation with BER < 10(-12) while consuming 53 mW (adaptation on)/45 mW (adaptation off), of which the core signal processing circuits consume only 29 mW.

• 出版日期2012-4