摘要

This paper presents an on-chip delay measurement (OCDM) circuit with a wide delay-measurement range, a high delay-measurement resolution and low supply-voltage sensitivity for efficient detection, and diagnosis in the high-performance system-on-chip (SoC). The proposed cascade-stage measurement structure can simultaneously achieve a delay-measurement range of several nanoseconds and a quantization resolution of several picoseconds. The proposed delay-measurement circuit has a high immunity to supply voltage variations without any additional calibration or self-biasing circuit. The delay-measurement range is 5.25 ns with 6 ps resolution; and the average delay resolution variation is 0.41% with +/-10% supply voltage variations. Published by AIP Publishing.

  • 出版日期2016-11

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