摘要

A fourth-order single-loop 1-bit sigma delta (Sigma Delta) modulator for digital gyroscope sensor interface circuit is presented in this paper. The effects caused by mismatch between parasite capacitors at the input of the operational transconductance amplifier (OTA) and the nonlinear on-resistance of the CMOS switch are analyzed. The chopping technique is adopted to eliminate the flick noise in low frequency. The modulator is fabricated in a standard CMOS 0.5-mu m process and the effective area is 2 mm(2). The power dissipation is 9.66 mW when the voltage is 5 V. The tested results show that a 93.7-dB peak signal-to noise -and-distortion ratio (SNDR) and a 99.7-dB dynamic range (DR) are achievable at the sample frequency of 500 kHz for 2 kHz bandwidth. The optimization of the switches used in the first integrator and the parasite capacity is proved to be effective in the design of modulator.

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