An SDRAM controller optimized for high definition video coding application

作者：Zhu, Jiayi^*; Liu, Peilin; Zhou, Dajiang

来源：IEEE International Symposium on Circuits and Systems, United States, 2008-05-18 to 2008-05-21.

DOI：10.1109/ISCAS.2008.4542218

• Access management
• Bandwidth efficiency
• Bandwidth requirement
• High definition video coding
• Large amounts of data
• Pre-charge
• SDRAM controllers
• Video decoders

The huge SDRAM bandwidth requirement is an architectural bottleneck of video decoders. Besides the large amounts of data transmission cycles, many extra overhead (up to over 50%) are incurred by the ACTIVE or PRECHARGE (A\P) operations in conventional SDRAM controllers. In this paper, we propose an optimized SDRAM controller, which can improve the bandwidth efficiency by eliminating most of the extra overhead. An access management scheme that enables consecutive data transmission is employed to reduce the need of A\P operations. In addition, a scheduler is designed to hide the latency for A\P operations. Experimental result shows that the SDRAM controtler is able to meet the bandwidth requirement of real-time decoding 1080P H.264 video streams, at less than 100Mhz with 32-bit DDR SDRAM.

• 出版日期2008
• 单位上海交通大学