摘要

An alternative technique for production of devices which uses both silicon crystalline wafers (p-type) and heavy doped amorphous silicon thin films (n-type) is reported. The amorphous silicon acts as a finite source of dopant and is deposited (at low temperature, 70 degrees C) by plasma enhanced chemical vapor deposition on silicon wafers. Afterwards, the process of dopant diffusion into the crystalline silicon occurs in a diffusion furnace at 1000 degrees C for 2 h, to create p-n junctions. Using SIMS analyses, a dopant (P) transfer into c-Si of about 30% is verified and 87% of the dopant transferred is electrically active. Consequently, n-MOSFET devices are produced using a gate oxide thermally grown at the same diffusion temperature for one hour. The preliminary results of the MOSFET (channel length and width of 0.5 and 5 mm, respectively) show a depletion behavior with a threshold voltage, V-th = -8.2 V and afield-effect mobility, mu(FE)= 187.8 cm(2)/(Vs).

  • 出版日期2016-2

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