摘要

This letter presents a K-band CMOS power amplifier that adopted a unilateralized technique to mitigate the intrinsic gate-drain feedback effect of the transistor for increasing the reverse isolation and power gain. This three-differential-stage amplifier used low-loss transmission-line transformers (TLTs) for the input/output impedance matching networks and the transformers (TFs) for the inter-stage coupling. The obtained 3-dB bandwidth is from 18.8 to 23.3 GHz with better than 58-dB reverse isolation. The amplifier achieves a power gain of 26.2 dB, a saturation output power of 20.3 dBm, an output 1-dB gain compression point of 17.2 dBm and power added efficiency (PAE) of 24.1% under a power consumption of 440 mW. The chip size is 1.12 mm(2) including all pads.