A 12 GHz low-jitter LC-VCO PLL in 130 nm CMOS

作者：You Y^*; Chen J; Feng Y; Tang Y; Huang D; Rui W; Gong D; Liu T; Ye J

来源：Journal of Instrumentation, 2015, 10(03): C03013.

DOI：10.1088/1748-0221/10/03/C03013

• VLSI circuits
• Analogue electronic circuits
• Radiation-hard electronics
• Digital electronic circuits

We present a wideband low-jitter LC-VCO phase-locked loop in 130 nm CMOS technology for high speed serial link applications. The PLL covers a 5.6 GHz to 13.4 GHz frequency range by using two LC-VCO cores with an RMS jitter of 370 fs. The single event effects testing is performed with a neutron beam at Los Alamos National Laboratory and no frequency disturbance is found over the test period. The PLL consumes 50.88 mW of power under a 1.2 V power supply.

• 出版日期2015-3