A 0.6V passive mixer with high conversion gain in 65 nm CMOS process

作者:Chen Chao*; Wu Jianhui; Cai Zhikuang
来源:IEICE Electronics Express, 2015, 12(3): 20141127.
DOI:10.1587/elex.12.20141127

摘要

A passive mixer with a complementary gm stage and a low voltage IF trans-impedance amplifier, which can operate under low voltage conditions, is proposed in this letter. With at most two transistors stacked between vdd and gnd, the proposed mixer can be realized in regular CMOS processes without reducing the threshold voltage of transistors. A high conversion gain is obtained thanks to the high utilization efficiency of the RF current generated by the trans-conductance (gm) stage. A prototype of the proposed mixer structure which works in the frequency band from 1 GHz to 2 GHz is designed and fabricated in SMIC 65 nm CMOS process. Measurement results indicate that, the prototype achieves a conversion of 22 dB and a noise figure of 15 dB. The power consumption is 1.2 mW under the supply voltage of 0.6 V.