NOVEL REVERSIBLE FAULT TOLERANT ERROR CODING AND DETECTION CIRCUITS

作者：Haghparast Majid^*; Navi Keivan

来源：International Journal of Quantum Information, 2011, 9(2): 723-738.

DOI：10.1142/S0219749911007447

• Quantum computation
• reversible logic design
• fault tolerance
• Hamming code
• cyclic code
• low power design
• parity-preserving reversible circuits
• nanotechnology

Reversible logic is an emerging area of research, having applications in nanotechnology, low power CMOS design, quantum computing, and DNA computing. In this paper, two different parity-preserving reversible error coding and detection circuits are studied. First we propose two new reversible Hamming code generator circuits. One of them is parity-preserve. We also propose a new parity-preserving reversible Hamming code error detector circuit. The proposed parity-preserving reversible Hamming code generator (PPHCG) and error detector circuits provide single error correction-double error detection (SEC-DED). The designs are better than the existing counterparts in terms of quantum cost (QC), number of constant inputs, and number of garbage outputs. Then we propose parity-preserving reversible cyclic code encoder/decoder circuits for the first time. A parity-preserving reversible D flip-flop is also proposed. Equivalent quantum representation of two parity-preserving 4*4 reversible gates, IG, and PPHCG, are also proposed. We show for the first time that IG has a QC of only 7 and PPHCG has a QC of only 6.

• 出版日期2011-3