A CMOS Envelope-Tracking Transmitter With an On-Chip Common-Gate Voltage Modulation Linearizer

作者：Kim Woo Young^*; Son Hyuk Su; Kim Joon Hyung; Jang Joo Young; Oh Inn Yeal; Park Chul Soon

来源：IEEE Microwave and Wireless Components Letters, 2014, 24(6): 406-408.

DOI：10.1109/LMWC.2014.2313593

• CMOS
• envelope elimination and restoration (EER)
• envelope tracking (ET)
• linearizer
• long term evolution (LTE)
• multi-band
• power amplifier (PA)
• wideband code division multiple access (WCDMA)

This letter presents a fully integrated CMOS envelope-tracking transmitter with an on-chip common-gate voltage modulation linearizer that achieves an average output power of 26/23.5 dBm with a PAE of 33/28%, an ACLR of - 33/ -32.5 dBC at a frequency of 1.9 GHz for 3.84 MHz BW 3.5 dB PAPR WCDMA and 5 MHz BW 7.5 dB PAPR LTE signals in an 0.18-mu m CMOS process. The CMOS ET transmitter is integrated with an envelope amplifier, two pairs of saturated power amplifiers, and an on-chip linearizer. The total chip size is 2.5 x 1.5 mm(2) with the input/output on-chip transformers and matching networks.

• 出版日期2014-6