摘要

A double-capacitor phase error compensation configuration is proposed for G(m)-C and MOSFET-C filters. The use of two capacitors enables the effective compensation capacitance to track with the tuning resistance, thereby making it more effective over a wider frequency tuning range as compared to the conventional single-capacitor configuration. Simulations of 5th-order Chebyshev filters in a 0.18 mu m CMOS process with more than one octave tuning range were carried out to demonstrate the viability of the proposed double-capacitor configuration for both G(m)-C and MOSFET-C filters.

  • 出版日期2009-1

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