摘要
We present an aging analysis which considers variations in chip environment and workload as they are caused by dynamic voltage or frequency scaling, power-down modes, etc. Therefore, we developed a model for NBTI degradation and recovery based on trapping/detrapping. Our model accurately describes the relaxation during detrapping, the quasi-permanent degradation and shows good agreement with measurements from a 65 nm technology. The aging analysis utilizes this model to consider variations in environment and workload. Results show that our analysis can be used for system-level design decisions and reduces substantially estimated degradation.
- 出版日期2014-7