Low-Power Digital Signal Processor Architecture for Wireless Sensor Nodes

作者:Walravens Cedric*; Dehaene Wim
来源:IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014, 22(2): 313-321.
DOI:10.1109/TVLSI.2013.2238645

摘要

Radio communication exhibits the highest energy consumption in wireless sensor nodes. Given their limited energy supply from batteries or scavenging, these nodes must trade data communication for on-the-node computation. Currently, they are designed around off-the-shelf low-power microcontrollers. But by employing a more appropriate processing element, the energy consumption can be significantly reduced. This paper describes the design and implementation of the newly proposed folded-tree architecture for on-the-node data processing in wireless sensor networks, using parallel prefix operations and data locality in hardware. Measurements of the silicon implementation show an improvement of 10-20x in terms of energy as compared to traditional modern micro-controllers found in sensor nodes.

  • 出版日期2014-2