科研之友
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摘要
Boost converter often exhibits large output voltage ripples and slow transient response due to the pulsating output capacitor current and the right-half-plane zero in transfer function from duty ratio to output voltage. On the contrary, a KY converter shows small output voltage ripples and fast transient response compared with the boost converter thanks to its buck-converter-like characteristics. In this study, a comprehensive study of an integrated KY converter considering parasitic resistance is presented as design guidelines for its IC implementation, and various aspects of KY converter versus boost converter are also analyzed to show its advantages. In particular, optimum transistor sizes, power losses, and output voltage ripples are analyzed in depth. The designs of power components including energy-transferring capacitor, inductor, and filter capacitor are discussed. Theoretical derivations of load and line regulations are also provided. The designed KY converter has been fabricated with standard 0.18-mu m CMOS process and the total chip area is 1.93 mm(2) including pads. The output voltage is 2.5 V with the regulated supply voltage ranging from 1.55 to 1.8 V, at switching frequency of 1 MHz. The output voltage ripples are 10 mV. Maximum efficiency of 95.7% is obtained at load current of 55 mA and supply voltage of 1.8 V. Efficiency is no less than 92.9% for load current as low as 30 mA. Even with simple compensation scheme employed, the output voltage settles within 48 mu s when loading a step current of 150 mA.
- 出版日期2017-12
- 单位西安交通大学
