A 0.6-V Delta-Sigma Modulator With Subthreshold-Leakage Suppression Switches

作者：Roh Hyungdong^*; Kim Hyoungjoong; Choi Youngkil; Roh Jeongjin; Kim Yi Gyeong; Kwon Jong Kee

来源：IEEE Transactions on Circuits and Systems II-Express Briefs, 2009, 56(11): 825-829.

DOI：10.1109/TCSII.2009.2032444

• Analog-to-digital converter (ADC)
• delta-sigma modulator
• harmonic distortion
• leakage current
• signal-to-noise-plus-distortion ratio (SNDR)
• switched-capacitor circuit

A 0.6-V 34-mu W delta-sigma modulator implemented by using a standard 0.13-mu m complementary metal-oxide-semiconductor technology is presented. This brief analyzes a subthreshold-leakage current problem in switched-capacitor circuits and proposes subthreshold-leakage suppression switches to solve the problem. To verify the operation of the subthreshold-leakage suppression switches, two different fifth-order delta-sigma modulators are implemented with conventional switches and new switches. The input feedforward architecture is used to reduce the voltage swings of the integrators. A high-performance low-quiescent amplifier architecture is developed for the modulator. The modulator, with new switches, achieves a dynamic range of 83 dB, a peak signal-to-noise ratio of 82 dB, and a peak signal-to-noise-plus-distortion ratio of 81 dB in a signal bandwidth of 20 kHz. The power consumption is 34 mu W for the modulator, and the core chip size is 0.33 mm(2).

• 出版日期2009-11