摘要
We present a template-based pipeline that performs real-time speed-limit-sign recognition using an embedded system with a low-end CPU as the main processing element. Our pipeline operates in the frequency domain, and uses nonlinear composite filters and a contrast-enhancing preprocessing step to improve its accuracy. Running at interactive rates, our system achieves 90% accuracy over 120 EU speed-limit signs on 45 minutes of video footage, superior to the 75% accuracy of a non-real-time CPU-based SIFT pipeline.
- 出版日期2010