Design approach for fast-settling two-stage amplifiers employing current-buffer Miller compensation

作者：Pugliese A^*; Amoroso F A; Cappuccino G; Cocorullo G

来源：Analog Integrated Circuits and Signal Processing, 2009, 59(2): 151-159.

DOI：10.1007/s10470-008-9215-4

• Operational amplifiers
• Frequency compensation
• Transient response
• Pole-zero analysis
• Switched-capacitor integrator
• CMOS analog integrated circuit design

A new settling-time-oriented design strategy for two-stage operational amplifiers with current-buffer Miller compensation is presented. The proposed approach defines a systematic procedure to optimize the amplifier time response, allowing the required speed performances to be achieved without both power wasting and blind efforts for time-consuming trial-and-error design processes. To demonstrate the effectiveness of the methodology, a design example in a commercial 0.35 mu m CMOS technology is presented. As shown by circuit and statistical simulations, the proposed strategy proves to be very useful to develop fast-settling operational amplifiers for typical discrete-time applications, such as switched-capacitor filters and I I" pound analog-to-digital converters.

• 出版日期2009-5