A High-Throughput Pipelined Parallel Architecture for JPEG XR Encoding

作者：Tsutsui Hiroshi^*; Hattori Koichi; Ochi Hiroyuki; Nakamura Yukihiro

来源：ACM Transactions on Embedded Computing Systems, 2012, 11(4): 72.

DOI：10.1145/2362336.2362339

• Design
• Experimentation
• Performance
• JPEG XR
• image coding
• pipelined architecture
• parallel architecture
• scalability

JPEG XR is an emerging image coding standard, based on HD Photo developed by Microsoft Corporation. It supports high compression performance twice as high as the de facto image coding system, namely, JPEG, and also has an advantage over JPEG 2000 in terms of computational cost. JPEG XR is expected to be widespread for many devices including embedded systems in the near future. In this article, we propose a novel architecture for JPEG XR encoding. In previous architectures, entropy coding was the throughput bottleneck because it was implemented as a sequential algorithm to handle data with dependency. We found that there is no dependency in intra-macroblock data, and we could safely pipeline all the encoding processes including the entropy coding. In addition, each module of our architecture, which can be regarded as a pipeline stage, can be parallelized. As a result, our architecture can achieve 12.8 pixel/cycle at its maximum. To demonstrate our architecture, we designed three versions of our architecture with different degrees of parallelism of one, two, and four. Our four-way parallel architecture achieves 579 Mpixel/sec at 181MHz clock frequency for grayscale images.

• 出版日期2012