A System-Level FPGA-Based Hardware-in-the-Loop Test of High-Speed Train

作者：Liu, Chen^*; Guo, Xizheng; Ma, Rui; Li, Zhongliang; Gechter, Franck; Gao, Fei

来源：IEEE Transactions on Transportation Electrification, 2018, 4(4): 912-921.

DOI：10.1109/TTE.2018.2866696

• dSPACE simulator
• field-programmable gate array (FPGA)
• hardware-in-the-loop (HIL)
• high-speed train

Hardware-in-the-loop (HIL) test provides a time saving and safe environment for testing high-power electronic systems. But the main difficulty for the HIL test of power electronic system lies on the modeling of the complex and high-power system. This paper proposes a modeling method of the electrical system of high-speed train. With this method, the HIL test platform using field-programmable gate array boards is built. Besides, in order to meet the computing power requirement of the system modeling, we simulate the whole system using two dSPACE simulators and inside each dSPACE simulator, a multiprocessor system is achieved through Gigalink connection. The whole HIL system can be used to evaluate both the hardware and software performance of traction control unit and auxiliary control unit. The HIL results under steady state and transient conditions demonstrate modeling accuracy and provide a detailed insight into its development.

• 出版日期2018-12
• 单位西北工业大学; 北京交通大学