A 1-Gbps reference-less burst-mode CDR with embedded TDC in a 65-nm CMOS process

作者：Wang, Yuan^*; Jiang, Mengying; Liu, Baoguang; Jia, Song; Zhang, Xing

来源：International Journal of Circuit Theory and Applications, 2018, 46(8): 1565-1576.

DOI：10.1002/cta.2490

• burst-mode
• clock and data recovery (CDR)
• quantization error
• time-to-digital converter (TDC)

A reference-less all-digital burst-mode clock and data recovery circuit (CDR) is proposed in the paper. The burst-mode CDR includes a coarse and a fine time-to-digital converter (TDC) with embedded phase generator. A low-power current-starved inverter is employed as the delay unit of the fine TDC to acquire the high measurement resolution. A calibration method to diminish the inherent delay is used to reduce the quantization error of the recovery clock. The proposed CDR is fabricated in a 65-nm CMOS process. Experiment results show that the CDR operates from 0.9 to 1.1Gbps and have a 13-bit consecutive identical digits (CIDs) tolerance.

• 出版日期2018-8
• 单位北京大学