A Delta-Sigma Interface Circuit for Capacitive Sensors With an Automatically Calibrated Zero Point

作者：Shin Dong Yong^*; Lee Hyunjoong; Kim Suhwan

来源：IEEE Transactions on Circuits and Systems II-Express Briefs, 2011, 58(2): 90-94.

DOI：10.1109/TCSII.2010.2104015

• Capacitance
• delta-sigma modulation
• readout integrated circuit
• sensors
• successive approximation register (SAR)

We present a low-complexity interface circuit for capacitive sensors that are integrated into sensor microsystems. To reduce hardware cost while keeping high resolution, a first-order delta-sigma modulator (DSM), which balances the charge from the capacitive difference between sense and reference capacitors with the charge from a fixed-quantity capacitor, is employed. A charge-mode digital-to-analog converter and a successive approximation register are utilized to automatically calibrate the zero point of the interface circuit, which may shift further than a dynamic range. A prototype circuit fabricated in a 0.35-mu m CMOS process has an active area of 0.048 mm(2). Its DSM operates at a sampling frequency of 1 MS/s with an oversampling ratio of 128. Experiments show that this circuit can read a capacitive difference from -0.5 to +0.5 pF with a 0.49-fF resolution. A capacitive offset that causes the zero point to shift can be canceled in the range from -2 to 2 pF with a 31.25-fF resolution. Measured power consumption was 1.44 mW at a 3.3-V supply.

• 出版日期2011-2