An auto-calibrated, dual-mode SRAM macro using a hybrid offset-cancelled sense amplifier

作者：Attarzadeh H^*; Sharifkhani M

来源：MICROELECTRONICS JOURNAL, 2014, 45(6): 781-792.

DOI：10.1016/j.mejo.2014.02.015

• SRAM
• Current sense amplifier
• Offset cancellation
• Dual mode
• Low power

A dual-mode power and performance optimized SRAM is presented. Given the fact that the power and speed associated with the cell access time are directly related to the sense amplifier offset a new optimization platform based on the hybrid offset-cancelled current sense amplifier (OCCSA) [1] is presented. It is shown that the speed and power overhead of the offset cancellation can be optimized in a multi-variable auto-calibration loop to achieve the lowest power or the highest performance mode. The flexibility of having two degrees of freedom in OCCSA offers a significant bitline delay reduction with minimum power sacrifice in the high performance mode. The proposed scheme is verified using a macro cell implemented in a 0.18 mu m CMOS technology. In the Power Optimized mode, a wide range of offset is applied to a single column test structure and 25% energy consumption reduction is measured compared to the conventional case. For a 32 kb SRAM array, compared to a conventional sense amplification, a 2X reduction in energy consumption is achieved in the Energy Optimized mode. Thanks to the offset cancelling nature of the proposed scheme, a 2X improvement in cell access time is achieved in the Speed Optimized mode.

• 出版日期2014-6