An integrated high-level on-line test synthesis tool

作者：Oikonomakos Petros^*; Zwolinski Mark

来源：IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2006, 25(11): 2479-2491.

DOI：10.1109/TCAD.2006.882120

• data-flow synthesis
• design for testability
• high level synthesis
• test synthesis

Several researchers have recently implemented online testability in the form of duplication-based self-checking digital system design, early in the design process. The authors consider the on-line testability within the optimization phase of iterative, cost function-driven high-level synthesis, such that self-checking resources are inserted automatically without any modification of the source behavioral hardware description language code. This is enabled by introducing a metric for the on-line testability. A new variation of duplication (namely inversion testing) is also proposed and used, providing the system with an additional degree of freedom for minimizing hardware overheads associated with test resource insertion. Considering the on-line testability within the synthesis process facilitates fast and painless design space exploration, resulting in a versatile high-level-synthesis process, capable of producing alternative realizations according to the designer's directions, for alternative target technologies. Finally, the fault escape probability of the overall scheme is discussed theoretically and evaluated experimentally.

• 出版日期2006-11