Analysis of stability improvement in ZnO thin film transistor with dual-gate structure under negative bias stress

作者：Yun Ho Jin^*; Kim Young Su; Jeong Kwang Seok; Kim Yu Mi; Yang Seung dong; Lee Hi Deok; Lee Ga Won

来源：Japanese Journal of Applied Physics, 2014, 53(4): 04EF11.

DOI：10.7567/JJAP.53.04EF11

In this study, we fabricated dual-gate zinc oxide thin film transistors (ZnO TFTs) without additional processes and analyzed their stability characteristics under a negative gate bias stress (NBS) by comparison with conventional bottom-gate structures. The dual-gate device shows superior electrical parameters, such as subthreshold swing (SS) and on/off current ratio. NBS of V-GS = -20V with V-DS = 0 was applied, resulting in a negative threshold voltage (V-th) shift. After applying stress for 1000 s, the V-th shift is 0.60V in a dual-gate ZnO TFT, while the V-th shift is 2.52V in a bottom-gate ZnO TFT. The stress immunity of the dual-gate device is caused by the change in field distribution in the ZnO channel by adding another gate as the technology computer aided design (TCAD) simulation shows. Additionally, in flicker noise analysis, a lower noise level with a different mechanism is observed in the dual-gate structure. This can be explained by the top side of the ZnO film having a larger crystal and fewer grain boundaries than the bottom side, which is revealed by the enhanced SS and XRD results. Therefore, the improved stability of the dual-gate ZnO TFT is greatly related to the E-field cancellation effect and crystal quality of the ZnO film.

• 出版日期2014-4