The fabrication and the reliability of poly-Si MOSFETs using ultra-thin high-K/metal-gate stack

作者：Lee M H^*; Chen K J

来源：Solid-State Electronics, 2013, 79: 244-247.

DOI：10.1016/j.sse.2012.07.009

• 3D-ICs
• Poly-Si
• High-K
• Reliability

Poly-Si MOSFETs using a gate stack composed of ultra-thin HfSiOx and TiN are shown, and they are compatible with a monolithic three-dimensional integrated circuit (3D-ICs) process with the highest thermal budget of 700 degrees C. The poly-Si MOSFETs were studied for fabrication process temperatures with parasitic resistance, effective gate length, and grain boundary trap density. The short-channel effect with V-T (threshold voltage), subthreshold swing (SS), and drain-induced barrier lowering (DIBL) was also compared at 650 degrees C and 700 degrees C. For stress reliability of both hot carrier and PBTI, the short-channel devices showed more stability in V-T than the long-channel devices due to less grain boundary scattering. This study promotes the ultra-thin high-K/metal gate poly-Si MOSFET as a candidate for future monolithic 3D-ICs and silicon-on-glass (SOG) applications.

• 出版日期2013-1