A 4 ×2 switch matrix in QFN24 package for 0.5-3 GHz application

作者：Liu Yuzhe^*; Mu Pengfei; Gong Renjie; Wan Jing; Zhang Yulin; Yan Yuepeng

来源：Chinese Journal of Semiconductors, 2014, 35(12): 125012.

DOI：10.1088/1674-4926/35/12/125012

• decoder
• PHEMT
• QFN24
• Single pole double throw
• Switch matrix

This paper presents a 4 ×2 switching matrix implemented in the Win 0.5 μm GaAs pseudomorphic high electron mobility transistor process, it covers the 0.5-3 GHz frequency range. The switch matrix is composed of 4 SPDT switch whose two output ports can simultaneously select the input port and a 4 to 8 bit digital decoder, both the radio frequency (RF) part and the digital part are integrated into one single chip. The chip is packaged in a low cost QFN24 plastic package. On chip shunt, capacitors at the input ports are taken to compensate for the bonding wire inductance effect. The designed switch matrix shows a good measured performance: the insertion loss is less than 5.5 dB, the isolation is no worse than 30 dB, the return loss of input ports and output ports is better than -10 dB, the input 1 dB compression point is better than 25.6 dBm, and the OIP3 is better than 37 dBm. The chip size of the switch matrix is only 1.45 ×1.45 mm2.

• 出版日期2014