摘要
We report on the electrical behaviour of metal-insulator-semiconductor (MIS) structures fabricated on p-type silicon substrates and using polymethylmethacrylate (PMMA) as the dielectric. Gold nanoparticles, single-wall carbon nanotubes and C-60, deposited at room temperature, were used as charge-storage elements. In all cases, the MIS devices containing the nanoparticles exhibited hysteresis in their capacitance versus voltage characteristics, with a memory window depending on the range of the voltage sweep. This hysteresis was attributed to the charging and discharging of the nanoparticles from the gate electrode. A relatively large memory window of about 2.2 V was achieved by scanning the applied voltage of an AI/PMMA/C-60/SiO2/Si structure between 4 and -4V. Gold nanoparticle-based memory devices produced the best charge retention behaviour compared to the other MIS structures investigated.
- 出版日期2009-3-15