A 5-20 GHz 5-Bit True Time Delay Circuit in 0.18 mu m CMOS Technology

作者:Choi Jae Young*; Cho Moon Kyu; Baek Donghyun; Kim Jeong Geun
来源:Journal of Semiconductor Technology and Science, 2013, 13(3): 193-197.
DOI:10.5573/JSTS.2013.13.3.193

摘要

This paper presents a 5-bit true time delay circuit using a standard 0.18 mu m CMOS process for the broadband phased array antenna without the beam squint. The maximum time delay of similar to 106 ps with the delay step of similar to 3.3 ps is achieved at 5-20 GHz. The RMS group delay and amplitude errors are %26lt;1 ps and %26lt;2 dB, respectively. The measured insertion loss is %26lt;27 dB and the input and output return losses are %26lt;12 dB at 5-15 GHz. The current consumption is nearly zero with 1.8 V supply. The chip size is 1.04 x 0.85 mm(2) including pads.

  • 出版日期2013-6