A 0.45 V 100-Channel Neural-Recording IC With Sub-mu W/Channel Consumption in 0.18 mu m CMOS

作者：Han Dong^*; Zheng Yuanjin; Rajkumar Ramamoorthy; Dawe Gavin Stewart; Je Minkyu

来源：IEEE Transactions on Biomedical Circuits and Systems, 2013, 7(6): 735-746.

DOI：10.1109/TBCAS.2014.2298860

• Current reuse
• dynamic range folding
• multichannel neural recording
• noise efficiency factor (NEF)
• successive approximation register (SAR)
• two-level power supply

Neural prosthetics and personal healthcare have increasing need of high channel density low noise low power neural sensor interfaces. The input referred noise and quantization resolution are two essential factors which prevent conventional neural sensor interfaces from simultaneously achieving a good noise efficiency factor and low power consumption. In this paper, a neural recording architecture with dynamic range folding and current reuse techniques is proposed and dedicated to solving the noise and dynamic range trade-off under low voltage low power operation. Measured results from the silicon prototype show that the proposed design achieves 3.2 mu Vrms input referred noise and 8.27 effective number of bits at only 0.45 V supply and 0.94 mu W/channel power consumption.

• 出版日期2013-12
• 单位南阳理工学院