An efficient threshold voltage generation for SAR ADCs

作者：Khoshakhlagh Mohammad; Yavari Mohammad^*

来源：Analog Integrated Circuits and Signal Processing, 2013, 75(1): 161-169.

DOI：10.1007/s10470-013-0028-8

• Analog-to-digital converters
• Successive-approximation register ADCs
• Charge redistribution DACs
• SAR logic

In this paper, a new architecture for successive-approximation register (SAR) analog-to-digital converters (ADCs) is presented. In the proposed scheme, the threshold voltage for each comparison is divided into two parts. This results in appreciably less switching energy and less total capacitance without a substantial increase in digital complexity compared to the conventional SAR ADC. Analytical calculations and circuit level simulation results in the context of a 10-bit 100 kS/s ADC are provided to verify the usefulness of the proposed SAR ADC scheme revealing 87 % less switching power and 40 % less total capacitance in comparison with the conventional SAR ADC.

• 出版日期2013-4