摘要

This paper presents a low phase noise frequency synthesizer for WiMAX applications. The operating frequency of the proposed design ranges from 2.2 GHz to 2.4 GHz with a 1.25 MHz spacing for the 1.25 MHz to 40 MHz channel bandwidth. The proposed VCO suppresses the phase noise effectively by adopting the Q-enhancement technique, the memory reduced tail current, and a noise filter. The high speed frequency divider is implemented by an improved TSPC D-flip-flop. The proposed design is fabricated in a TSMC 0.18 mu m CMOS 1P6M process. The measured phase noise is -118 Bc/Hz at an offset of 1 MHz from the center frequency. The fabricated chip consumes 25.5 mW with a 1.5 V supply and occupies a 1.1 mm(2) die area.