A Practical Data Classification Framework for Scalable and High Performance Chip-Multiprocessors

作者：Li Yong^*; Melhem Rami; Jones Alex K

来源：IEEE Transactions on Computers, 2014, 63(12): 2905-2918.

DOI：10.1109/TC.2013.161

• Practically private
• data classification
• pipelined parallel
• multi-threaded parallel
• OpenMP
• compilers
• cache coherence

State-of-the-art chip multiprocessor (CMP) proposals emphasize general optimizations designed to deliver computing power for many types of applications. Potentially, significant performance improvements that leverage application-specific characteristics such as data access behavior are missed by this approach. In this paper, we demonstrate how scalable and high-performance parallel systems can be built by classifying data accesses into different categories and treating them differently. We develop a novel compiler-based approach to speculatively detect a data classification termed practically private, which we demonstrate is ubiquitous in a wide range of parallel applications. Leveraging this classification provides efficient solutions to mitigate data access latency and coherence overhead in today's many-core architectures. While the proposed data classification scheme can be applied to many micro-architectural constructs including the TLB, coherence directory, and interconnect, we demonstrate its potential through an efficient cache coherence design. Specifically, we show that the compiler-assisted mechanism reduces an average of 46% coherence traffic and achieves up to 12%, 8%, and 5% performance improvement over shared, private, and state-of-the-art NUCA-based caching, respectively, depending on scenarios.

• 出版日期2014-12