A 27-mW 10-bit 125-MSPS charge domain pipelined ADC with a PVT insensitive boosted charge transfer circuit

作者:Chen Zhenhai~ Huang Songren~ Zhang Hong Yu Zongguang~ and Ji Huicai Wide Bandgap Semiconductor Technology Disciplines State Key Laboratory School of Microelectronics Xidian University Xi’an China China Electronic Technology Group Corporation No Research Institute Wuxi China School of Electronics and Information Engineering Xi’an Jiaotong University Xi’an China
来源:Chinese Journal of Semiconductors, 2013, (03): 112-120.

摘要

<正>A low power 10-bit 125-MSPS charge-domain(CD) pipelined analog-to-digital converter(ADC) based on MOS bucket-brigade devices(BBDs) is presented.A PVT insensitive boosted charge transfer(BCT) that is able to reject the charge error induced by PVT variations is proposed.With the proposed BCT,the common mode charge control circuit can be eliminated in the CD pipelined ADC and the system complexity is reduced remarkably.The prototype ADC based on the proposed BCT is realized in a 0.18μm CMOS process,with power consumption of only 27 mW at 1.8-V supply and active die area of 1.04 mm~2.The prototype ADC achieves a spurious free dynamic range(SFDR) of 67.7 dB,a signal-to-noise ratio(SNDR) of 57.3 dB,and an effective number of bits(ENOB) of 9.0 for a 3.79 MHz input at full sampling rate.The measured differential nonlinearity(DNL) and integral nonlinearity (INL) are +0.5/-0.3 LSB and +0.7/-0.55 LSB,respectively.